A/Prof. Andrew P. Paplinski

CSE2306/1308 Digital Logic

Assignment 1 Answers to be given in the assignment sheets. Due date: Monday, 27th March

Assignment 2 Answers to be given in the assignment sheets. Due date: Monday, May 1st

Assignment 3 Due date: Monday, May 22nd (Ver. 15 May, 8am)

2005 exam (scans in the png format)

Practicals/tutorials

• Use Allocate+ to get allocation to practical classes and tutorials
• Tutorials and pracs start in week 2
• Please contact Robert.Prain@csse.monash.edu.au (bldg75, rm 188) regarding problems with allocation.
• Please note that the attendance at practical classes and tutorials is compulsory.
• Consultation time: Friday 11:00 am, room 75-188
• Demonstrate the results of your practical work to your tutor.
• Schedule of the practical classes and assignments
  Reports and assignments are due on Monday 1:00pm in the School office in the week indicated.
• Read about IT computer laboratories here.

Practical manuals:

1. Prac 1 -- Introduction to HDL Designer

2. Prac 2 -- Introduction to ModelSim simulator

3. Prac 3 -- Canonical forms. Decoders.

4. Prac 4 -- Unstructured combinational circuits
   Complete the design of the 7-segment driver as described in the prac manual before your prac session.

5. Prac 5 -- An n-bit Arithmetic-Logic Unit
   Full description of the force command (simulation scripts).

6. Prac 6 -- Division-by-constant combinational circuit

7. Prac 7 -- Asynchronous sequential circuits

8. Prac 8 -- Registers and counters

9. Prac 9 -- Serial adder (ver. 07 May)

10. Prac 10 -- Word-Serial Multiplication Processor

Lecture Notes

VHDL primer

Table of contents

1. Introduction. Unit outline
   

   Lecture 1 Introductory concepts

2. Lecture 2 Numbers in digital systems

3. Lecture 3 Logic Gates and Boolean Algebra

4. Lecture 4 Canonical and Standard Forms

5. Lecture 5 Gate-level minimization

6. Lecture 6 Combinational circuits

7. Lecture 7 Arithmetic combinational circuits

8. Lecture 8 Design Example: A Division-by-Constant Combinational Circuit

9. Lecture 9 Sequential Circuits

10. Lecture 10 Registers and counters

11. Lecture 11 Synchronous State Machines (ver. 8 May, 9:55)

12. Lecture 12 Simple serial arithmetic processor (ver. 8 May, 4pm)

13. Lecture 13 Multipliers (ver. 9 May, 2pm)