Fabrication of CMOS Integrated Circuits

We will study details of CMOS Technology, and related manufacturing processes which are used to convert silicon into CMOS integrated circuits.

As a result of our study I would like you to write answers to the two following examination style questions and to hand in the answers (hard copy) on September 11th, either during the lecture or to my office after the lecture.
Your answer should be written in a style of what you might be able to write during the exam spending about 1.5 minutes per allocated mark.

I will not mark your answers, but will take them into account when marking relevant examination questions.

Questions:

1. Describe briefly technological steps used to manufacture a silicon wafer. (5 marks)

2. Described briefly technological steps required to manufacture a CMOS inverter. Clearly specify masks used in each step. Give relevant sketches. (15marks)

• Chapter 2 from: S-M. Kung and Y. Leblebici, CMOS Digital Integrated Circuits. Analysis and Design. McGraw-Hill, 2nd ed., 1999
  The above text is available electronically from: http://vlsi.wpi.edu/webcourse/

• Section 3.1 from: M. Michael Vai, VLSI Design, CRC Press, 2001

• This web presentation describes manufacturing of silicon wafers.
  http://www.mmc-sil.com/flash/siliconjourney.htm

• A short but interesting PPoint presentation of the main technological steps to fabricate CMOS integrated circuits from CERN Digital Microelectronics Group by Paulo Moreira:
  CMOStechnology.ppt

• A VLSI fabrication text http://eleceng.ukc.ac.uk/chipwise/vlsi_tutor/ from Department of Electronics, University of Kent

• A good text http://www.nanolab.ucla.edu/microlab/html/CMOS_fabrication.htm from the UCLA Microfabrication Laboratory

• YA(short)T http://www.elec.gla.ac.uk/groups/sim_centre/courses/cmos/fabrication.html from Department of Electronics and Electrical Engineering, University of Glasgow.